1. Field of Invention
The present invention relates to a method for manufacturing device isolation structure. More particularly, the present invention relates to a method for manufacturing a shallow trench isolation structure.
2. Description of Related Art
A complete integrated circuit is normally made from tens of thousand of transistor devices. To prevent any short-circuiting between two neighboring devices, an insulating layer must be formed between them. Besides using the LOCOS method, another commonly used device isolating structure is the shallow trench isolation (STI).
FIGS. 1A through 1C are cross-sectional views showing the progression of manufacturing steps in the production of a conventional shallow trench isolation structure. First, as shown in FIG. 1A, a pad oxide layer 11 and a silicon nitride layer 12 are sequentially formed over a substrate 10. Then, using conventional photolithographic and etching processes, the silicon nitride layer 12, the pad oxide layer 11 and the substrate 10 are patterned and etched to form an opening 13 in the substrate 10. The opening 13 serves as a trench for isolation purposes. A liner oxide layer 14 can also be formed on the interior surface of the opening 13. Thereafter, an oxide layer for isolating the devices is deposited over the silicon nitride layer 12 and into the opening 13, then a chemical-mechanical polishing (CMP) operation is performed to planarize the structure. After removing extra oxide from the oxide surface, an oxide layer 15 as shown in FIG. 1B is formed. Finally, the silicon nitride layer 12 and the pad oxide layer 11 are removed, and a complete device isolation structure is obtained as shown in FIG. 1C.
In the aforementioned steps, the pad oxide layer 11 is removed using a wet etching method. The etchant used in the etching is normally hydrofluoric acid solution. Since this is an isotropic etching solution, upper surface of the oxide layer 15 adjacent to the substrate 10 can be over-etched by the hydrofluoric acid. Consequently, recesses 16 are formed on portions of the trench sidewalls.
Furthermore, after the formation of the trench isolation regions, sometimes a sacrificial layer is formed on the surface of the substrate for protection purposes. In subsequent processes, the sacrificial layer will be removed similar to the removal of the pad oxide layer using hydrofluoric acid solution. Thus, the same problem of recess formation in the oxide layer next to the substrate surface recurs due to over-etching.
When the processes necessary for the manufacturing of semiconductor devices are finished, the recesses left behind on the oxide layer will tend to attract and accumulate charges. This has the effect of lowering the device threshold voltage and generates abnormal sub-threshold current. Such phenomenon is known as the "kink effect". The lowering of device threshold voltage and the generation of abnormal sub-threshold current will lead to a worsening of device quality and a lowering of the production yield. In addition, corner parasitic MOSFET will be formed in parallel with the active device, thereby leading to the occurrence of leakage current from the device. Hence, the outcome from this semiconductor manufacturing process is not too desirable.
In light of the foregoing, there is a need in the art to provide a better structure and manufacturing method for shallow trench isolation.